AMD RED BIOS EDITOR und MorePowerTool - BIOS-Einträge anpassen, optimieren und noch stabiler übertakten | Navi unlimited

[ApolloX]

@RedF aber du bist ca 200 Punkte an deinen Highscore ran gekommen. Also nicht schlecht.

 

[Veii]

Hmja. Du bist m. W. auch der Einzige, bei dem "TDC Drossel" positives bewirkt.

^^

Mit DFLL Änderungen bzw dem Undervolt, entfällt TDC Score Throttle "Trick"
Er ist nur nützlich um Fabric crashes zu verhindern , und weiterhin um etwas Frequency rauszuholen. Aber generell ist das ne overvoltage Sache und ein PPT limit später eher nützlich. Den ein TDC throttle verhindert zwar crashes, aber eigentlich verringert es VID requests. Genau so gut geht es mit dem Voltage Slider oder einfach eine tiefere Curve

 

[hellm]

MPT Team

That would be me, myself and i.

Do you think it's still a good idea for that "Dfll model select"?

I put everything now in "more" tab, extra dialog window.

..and there is a lot more i put there, not just the perpart-stuff:


I still have to test a little, will do that tomorrow. If i find no bugs release will be whenever igor finds the time. It is getting to eat my time lately..

 

[RX480]

Ist Das aus so nem 6950-Bios?
edit: jetzt seh ich´s bei Veii , ... ist aus nem 6900XTXH-Bios

... zumindestens erstmal beruhigend, das die Kurven 1+2+3 und 4+5 jeweils identisch sind
(hatte Das nach den Posts von Veii differenzierter/sprunghafter befürchtet)

... kann mir gar net vorstellen das normal "piecewise linear" dann "unruhiger" sein soll, ... maximal am Übergang Kurve 3 zu 4
--> evtl. dann bei den Sparsettings für Bereich <4 oder >3 entscheiden, hinsichtlich W+V+Mhz, also irgendwo zw. 200 und 250W@6900xtx
(die Grenze müsste dann ja bei ca. eff.2300MHz liegen mit dem 6950er, welches redF jetzt drin hat)

 

[Veii]

(hatte Das nach den Posts von Veii differenzierter/sprunghafter befürchtet)

KXTX

6950 vs 6800 - Linear

6700-6750XT PP-PW-Quadratic

Don't underestimate what an VertexPoint (B) change does
The first 3 are similar
usually the P0 and P4 stand out
P1 & P2 are similar
P3 and P4 show then binning changes

It's less about the similarity, but about the curvature itself
You can clearly see on Constant (C) that the Y height point on KXTX is very different between those
They are not the same curve

You can clearly see on Constant (C) that the Y height point on KXTX is very different between those

It has to be, anything else is lazy approach
Although using same Axis is lazy approach too, but i wont judge well maybe a slight bit for abandoning XTXH and non 6x50 tier
6800-6900 XT(X) card is the earliest with least love. 6750XT is the one that got most of the love. 6950 just barely followed XTXH OC REF, they are similar
Barebones XTXH is "booring" too , didn't get much tuning love

 

[RX480]

what means "c" ?
this is different in every curve

--> we need a new pic about those curves, ... may be the old RDNA1 is not the right one
(in the old pic "c" is the sag)

 

[Veii]

what means "c" ?
this is different in every curve

I was about to write something 4 weeks ago as correction post, but took 1-2 days and igorslab "save draft" option actually erased the whole post

A is the axis of the curvature
B is the middle-vertex point, of the curvature
C is the constant or +/- Y height of the curvature (height defines voltage)

I'll write a clear post once everything is perfectly known, and likely at the end of the Month
(busy, there is a lot to do still & RDNA3 is nearby)
Soo we can work with curves, Yuri finishes his job, i get my credits and people here have time explore them till/start of the next month
Try to google "quadratic function" & "Vertex Form" function. I learned it that way.

It's "bothersome" to imagine numbers and values
But as those are not voltage droops, they don't follow 6.25mV stepping and are more granular.
Hopefully we can make a visual plotter for this someday

EDIT: Picture is old and gladly never send. I lacked info
I can write this clearer now, but curve description stays

 

[PJVol]

I put everything now in "more" tab, extra dialog window.
..and there is a lot more i put there, not just the perpart-stuff:

Nice )

@Veii
Ok... I've made a couple of benches when managed to run 6800XT with the pp_table from 6950 liquid devil bios posted by RX480.
All tests made @ PPT 347W TDC 347A, MemClk 2100, DS off. Scores below for the PP_PWL and PWL mode respectively:
Superposition (Fmax 2750, Vdd offset 1080)
11,943 vs 12,077
Timespy (Fmax 2670, Vdd offset 1070)
22,404 vs 22,601

My verdict - not worth it.

 

[PJVol]

(had feared that after Veii’s posts would be more differentiated/erratic)

I thought everybody was used to it

 

[Veii]

My verdict - not worth it.

KXTX is still very overvolted ~ at least 100mV
https://github.com/kruzer/poclmembench grab this and start benching mem (1024) and L$ 128 size
(-r 1000 -s 128) & (-r 1000 -s 1024) // too low and variable is too big
You'll find some interesting results ... oh also branch prediction hits after some time.

There is a big rabbit hole
It's the usual zen issue of VID requests exceeding FIT max voltage and package throttling - now also included SOC in it

I thought everybody was used to it

Long posts, i try to avoid
LUXX and Igorslab is not used to it.
Long technical posts even less

Glad to have you here tho~

 

[PJVol]

from the omitted

Per Part is mostly Navi1x Quadratic Curvature but more granular in Voltage ranges.
Unless you mean ASIC (SKU) ?

I mean "Part" in the "per-part" term means a piece of silicon wafer, i.e. single monolithic chip, and in the above context - unique fused avfs data

93% clear on DFLL & 78% on whole Navi

I've asked which settings exactly in a 6800XT PP Table, aside from 5 DfllDroopInt's (a,b,c) one should modify to make it work, or setting these "a,b,c" VF points is enough?

 

[PJVol]

23,949 with 22.8.2 and Win11

What was the voltage and max PPT in this run? Did you override Vmax?
My ref. chip seems at the edge of stability even at Fmax 2750. This is with the Fmax 2720 and 408W PPT limit (1200mv Vmax)
& 2750 @414W

 

[RedF]

What was the voltage and max PPT in this run? Did you override Vmax?
My ref. chip seems not to be stable enough even at Fmax 2750. This is with the Fmax 2720 and 408W PPT limit (1200mv Vmax)

1,34V 500Watt ^^
The guys wanted to see something extreme.

 

[amtech]

^^

Anhang anzeigen 20474
22.242 not bad for a day setting : )
Were now set to 2600MHz.

excellent score !!!

23,949 with 22.8.2 and Win11
Anhang anzeigen 20477

OMG Excellent Score

 

[amtech]

23,949 with 22.8.2 and Win11
Anhang anzeigen 20477

You Have Excelent chip Both 5800x3d and 6800xt

 

[Veii]

@hellm you got a bug on .17 release
Section 0x0742 , 0x0746 & 0x074a
A, B, C changes are applying but not visible read out in software
So far all is fine

There is a potential issue with:
0x0810 & 0x0812 not always applying, somewhy. But couple of attempts and a full reboot & it works
Keep up the hard work

EDIT:
Also lovely

EDIT2:
Let me know once that is fixed so i can redownload.
Alternatively, come over to PM~

@PJVol i'll answer later with correct tutorial
It's bit too early, else yes main ones
I suggest to zero out DcBTCmin/max both, at first. Redo curve on light 3D load , low amperage (heaven is one)
Watch FPS drops to stay always above 60 and work with VID.
Once that is done increase DcBtcMax in 6 steps, 100 is max. It's PSM. Is BtcMax does not adapt automatically, add BtcMin to force it run X "scalar"

Alternatively reverse idea, drop PSM Voltage slider and that cuts down Btc margin. Check how much voltage headroom you have. I got 150mV cut.
I would leave around 50mV delta, for DcBtc to do it's thing. Timespy is high amperage load and needs more voltage.
Btc does adapt that, but for clean curve generation, zero them out first

---

EDIT3:
Ahh i know what happens @hellm
You reversed GFX & SOC field
Functionality is correct but both override fiels are "visually" swapped. Readout is swapped, functionality in corresponding field is correct

 

[hellm]

thx

Yes the bug was 2x AVFS GFX read out, the writing part was right; so SOC settings got overwritten with GFX part, if you hadn't changed them. I fixed it now, should be online by tomorrow morning.

VcBtcVminT0, VcBtcFixedVminAgingOffset and VcBtcVmin2PsmDegrationGb are Q2 voltage values, so they are rounded up/down. Should work.

 

[Veii]

thx

Featurebug maybe Typo;

DPM 5 is bugged. Accepts it written by 3rd party, but no write
Reads it correctly, just fails to write
DPM 4 too, soo likely whole section is bugged

 

[hellm]

again, thx

some sort of typo, read function is basically a copy of set function, only that 1 letter was changed, SetDlgItemTextW to GetDlgItemTextW; and here it still was the set function for 2 to 5, so every time you hit the OK button it just changed it to the value it was before.
Again, fixed version will be online by tomorrow morning for the official release.

 

[RedF]

Der link ist noch die 16.

EDIT: Jetzt ist es die 17 : )